Ecl clock driver


















Philips Semiconductors Product data PCK Low voltage differential ECL/PECL/HSTL clock driver Apr 23 2 FEATURES •85 ps part-to-part skew typical •20 ps output-to-output skew typical •Differential design •VBB output •Low voltage VEE range of – V to – V for ECL •Low voltage VCC range of + V to + V for PECL •75 kΩ input pull-down resistors. clock pulse. The SYU I/O are fully differential and K ECL compatible. Differential 10K ECL logic can interface directly into the SYU inputs. The SYU is part of Micrel’s high-speed precision edge timing and distribution family. For applications that require a different I/O combination, consult the Micrel website. Differential PECL/ECL/LVPECL/LVECL Clock and Data Driver 4 _____°C +25°C +85°C PARAMETER SYMBOL CONDITIONS MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS VOH - VOL ≥ mV, clock pattern, Figure 1 Switching Frequency fMAX VOH - VOL ≥ .


ECL/PECL Clock Driver with Clock Select and Output Enable The NBLVEP is a low skew 1-to differential clock driver, designed with clock distribution in mind, accepting two clock sources into an input multiplexer. The part is designed for use in low voltage applications which require a large number of outputs to drive. V ECL Differential Clock Driver The MCLVE is a low skew 1−to−9 differential driver, designed with clock distribution in mind. The MCLVE’s function and performance are similar to the popular MCE, with the added feature of low voltage operation. It accepts one signal input. 5 V ECL Differential Clock Driver Description The MC10E/E is a low skew 1-to-9 differential driver, designed with clock distribution in mind. It accepts one signal input, which can be either differential or else single-ended if the VBB output is used. The signal is fanned out to 9 identical differential outputs. An enable input is also provided.


The clock buffer consists of both differential output and single-ended output buffers. Single-ended output buffers may have either single-ended or differential. LVPECL, LVDS,. LVHSTL, HCSL, SSTL. 1. 8T33FS Low Voltage Differential PECL/HSTL. Clock Fanout Buffer. 0 - 2. PECL, HSTL. MCLVEPFAG, Clock Driver ECL ECL, PECL 2-Input, Pin LQFP. Datasheet Download Datasheet. 3D Model / PCB Symbol. Availability.

0コメント

  • 1000 / 1000